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  april 2009 ? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver fin1017 3.3v lvds, 1-bit, high-speed differential driver features ? greater than 600mbs data rate ? 3.3v power supply operation ? 0.5ns maximum differential pulse skew ? 1.5ns maximum propagation delay ? low power dissipation ? power-off protection ? meets or exceeds the tia/eia-644 lvds standard ? flow-through pinout simplifies pcb layout ? 8-lead soic and us8 packages save space description this single driver is designed for high-speed interconnects utilizing low voltage differential signaling (lvds) technology. the driver translates lvttl signal levels to lvds levels with a typical differential output swing of 350mv, which provides low emi at ultra-low power dissipation even at high frequencies. this device is ideal for high-speed transfer of clock or data. the fin1017 can be paired with its companion receiver, the fin1018, or with any other lvds receiver. ordering information part number operating temperature range eco status package packing method fin1017mx -40 to +85c green 8-lead small outline integrated circuit (soic), jedec ms-012, 0.150inch narrow tape and reel fin1017k8x -40 to +85c green 8-lead us8, jedec mo-187, variation ca 3.1mm wide tape and reel for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 2 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver pin configuration figure 1. soic figure 2. us-8 (top view) (1) note: 1. ground pins 4 and 5 for optimum performance. pin definitions pin# us-8 pin# soic name description 7 2 d in lvttl data input 2 7 d out+ non-inverting driver output 1 8 d out- inverting driver output 8 1 v cc power supply 4, 5 4 gnd / gnd s ground 3, 6 3, 5, 6 nc no connect function table input outputs d in d out+ d out- low logic level low logic level high logic level high logic level high logic level low logic level open low logic level high logic level
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 3 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage -0.5 +4.6 v d in dc input voltage -0.5 +6.0 v d out dc output voltage -0.5 +4.7 v i osd driver short-circuit current continuous a t stg storage temperature range -65 +150 c t j max junction temperature +150 c t l lead temperature (soldering, 10 seconds) +260 c human body model, jesd22-a114 6500 bus pins d out+ /d out- to gnd 10500 esd machine model, jesd22-a115 350 v xxx note to engi neering ? esd values here do not match what?s on www (pulled from p eoplesoft). xxx recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v cc supply voltage 3.0 3.6 v v in input voltage 0 v cc v t a operating temperature -40 +85 c
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 4 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver dc electrical characteristics over-supply voltage and operating temperature ranges, unless ot herwise specified. all typical values are at t a = 25c and with v cc = 3.3v. symbol parameter conditions min. typ. max. units v od output differential voltage 250 350 450 mv v od v od magnitude change from differential low-to-high 25 mv v os offset voltage 1.125 1.250 1.375 v v os offset magnitude change from differential low-to-high r l = 100 , see figure 3 25 mv i off power-off output current v cc = 0v, v out = 0v or 3.6v 20 ma v out = 0v -8 ma i os short-circuit output current v od = 0v 8 v ih input high voltage 2 v cc v v il input low voltage gnd 0.8 v i in input current v in = 0v or v cc 20 ma i i(off) power-off input current v cc = 0v, v in = 0v or 3.6v 20 ma v ik input clamp voltage i ik = -18ma -1.5 v no load, v in = 0v or v cc 8 ma i cc power supply current r l = 100 , v in = 0v or v cc 10 ma c in input capacitance 4 pf c out output capacitance 6 pf ac electrical characteristics over-supply voltage and operating temperature ranges, unless ot herwise specified. all typical values are at t a = 25c and with v cc = 3.3v. xxx there are no typical values! xxx symbol parameter test conditions min. max. units t plhd differential propagation delay, low-to-high 0.5 1.5 ns t phld differential propagation delay, high-to-low 0.5 1.5 ns t tlhd differential output rise time (20% to 80%) 0.4 1.0 ns t thld differential output fall time (80% to 20%) 0.4 1.0 ns t sk(p) pulse skew |t plh - t phl | 0.5 ns t sk(pp) part-to-part skew (2) r l = 100 , c l = 10pf, see figure 4 and figure 5 1.0 ns note: 2. t sk(pp) is the magnitude of the difference in propagation del ay times between any specified terminals of two devices switching in the same direction (either low-to-high or high-to-low) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 5 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver test diagrams figure 3. differential driver dc test circuit figure 4. differential driver propagation delay and transition time test circuit notes: note a: all input pulses have frequency = 10mhz, t r or t f = 2ns. note b: c l includes all probe and fixture capacitances. figure 5. ac waveforms
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 6 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver typical performance characteristics figure 6. output high voltage vs. power supply voltage figure 7. output low voltage vs. power supply voltage figure 8. output short circuit current vs. power supply voltage figure 9. differential output voltage vs. power supply voltage figure 10. differential output voltage vs. load resistor figure 11. offset voltage vs. power supply voltage
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 7 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver typical performance characteristics figure 12. power supply current vs. frequency figure 13. power supply current vs. power supply voltage figure 14. power supply current vs. ambient temperature figure 15. differential propagation delay vs. power supply figure 16. differential propagation delay vs. ambient temperature figure 17. differential pulse skew (t plh - t phl ) vs. power supply voltage
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 8 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver typical performance characteristics figure 18. differential pulse skew (t plh - t phl ) vs. ambient temperature figure 19. transition time vs. power supply voltage figure 20. transition time vs. ambient temperature
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 9 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver physical dimensions 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge figure 21. 8-lead small outline integrated circuit (soic), jedec ms-012, 0.150inch narrow package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 10 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver physical dimensions 0.30 typ seating plane 0.10-0.18 0.13 ab c c. dimensions are exclusive of burrs, mold flash, d. dimensions and tolerances per ansi y14.5m, 1982. and tie bar extrusions. mab08arevc 0.50typ b. dimensions are in millimeters. a. conforms to jedec registration mo-187 -c- 0.17-0.27 0.10 0.00 detail a 0-8 0.4 typ -b- 0.700.10 all lead tips 0.2 cba 3.1.1 0.15 pin #1 ident. 0.90 max all lead tips 0.1 c 1.55 8 1 4 2.30.1 5 -a- 0.70 2.70 3.40 1.00 0.5 typ detail a 1.80 gage plane 0.12 figure 22. 8-lead us8, jedec mo-187, variation ca 3.1mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2001 fairchild semiconductor corporation www.fairchildsemi.com fin1017 ? rev. 1.0.2 11 fin1017 ? 3.3v lvds, 1-bit, high-speed differential driver


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